Currently available as one type of AD converter apparatuses is a pipeline type AD converter apparatus. The pipeline type AD converter apparatus performs an AD conversion operation by a plurality of stages, and an AD converter at each stage outputs AD conversion results by M bits (M is an integer equal to one or more).
At least one of the AD converters has digital-analog (DA) function that converts an AD conversion result into an analog signal and amplifies a difference (referred to as a residual signal) between the DA conversion result and the analog signal input to the AD converter by 2M times through an amplifier. A subsequent AD converter receives the amplified residual signal as an analog signal, and outputs an AD conversion result at a lower bit.
If gain of 2M of the amplifier of each AD converter varies, an accurate AD conversion result may be difficult to obtain.
To address this problem, a dual-residue pipeline type AD converter apparatus has been disclosed. Each AD converter in this AD converter apparatus generates two residual signals. One residual signal is a difference between an input signal and a reference signal closest, to the magnitude of the input signal, and the other residual signal is a difference between the input signal and a reference signal next closest to the input signal. The two residual signals are amplified by separate amplifiers with the same gain, and then input to a subsequent AD converter. The subsequent AD converter receives as input signals the two amplified residual signals, determines a reference level, and outputs an AD conversion result at a lower bit. In this technique, the gain of the amplifier of each AD converter may not necessarily be 2M.
The above-described techniques are disclosed in Japanese Laid-open Patent Publication No. 2009-164914 and Japanese National Publication of International Patent Application No. 2003-505913, for example.